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Pcbnew / Kicad

Posted: 03 Nov 2012, 09:46
by 7bit
This is the Pcbnew troubleshooting thread.

Problem: I can't place modules with underscores in their names.

I wonder if this is an issue with different versions of pcbnew. However, I've solved it by removing any underscores.

Next problem:
How to delete a part of a module or edit the name, once it has been placed.

Solved: Just right-click at the component and choose the submenu of the first menu item.

Editing a module:
double-right-click gives the full menu to perform rotations etc.
:roll:

Posted: 03 Nov 2012, 11:20
by bpiphany
There is a "Preferences->Hotkeys->List Current Keys" menu where you can find all the short cuts. Pressing 'e' while hovering above a component brings up the edit menu. Or just the field directly under the pointer.

There are also other characters you shouldn't use for names, references and such, like " or \. No big surprise, but it would be nice to get a warning. Not just having the program crash at next start =P This can usually be fixed by editing the file by hand. Removing names with " and such. Take notice that "s screws the file up when put in text graphic items as well. I use double single tick marks instead.

Posted: 03 Nov 2012, 11:34
by mintberryminuscrunch
when I read this, I instantly thought "ask bpiphany, he knows about this stuff" ^^

Posted: 03 Nov 2012, 13:19
by 7bit
mintberryminuscrunch wrote:when I read this, I instantly thought "ask bpiphany, he knows about this stuff" ^^
Yes, but I want to wirte these things down somewhere, so we have some trouble-shooting database.

Thanks to bpiphany so far!

One question about the Cherry switches and diodes: Is the blue section the area where the switch is, or is it the yellow?

Posted: 03 Nov 2012, 14:43
by 7bit
Next Problem:

How to define a ratsnest?

The userguide says how to place the tracks but not how to define a ratsnest which must be there before the tracks.
:?

Posted: 03 Nov 2012, 15:29
by Soarer
:lol: n00b :P

You draw a schematic, then output the ratsnest from that.

Re: Pcbnew / Kicad

Posted: 03 Nov 2012, 15:39
by dirge
This needs to be a step by step really lol. I followed biphanys wiki then couldn't work out the rest for myself due to my monkey brain.

Posted: 03 Nov 2012, 15:53
by 7bit
Soarer wrote::lol: n00b :P

You draw a schematic, then output the ratsnest from that.
And how is the schematic drawn or generated? :oops:

It is a bit unclear to me how all these files relate to each other and which must be generated and which not:

hexboard.bak<--- Ok, that's easy.
hexboard.brd<--- This is the keybaord PCB edited with pcbnew.
hexboard.cmp<--- components???
hexboard.net<--- network???
hexboard.pro<--- preferences file.
hexboard.sch<--- schematic???

Posted: 03 Nov 2012, 16:02
by Soarer
7bit wrote: And how is the schematic drawn or generated? :oops:
With eeschema. Some good guides here.

BTW, netlist == ratsnest, effectively.

Basically... draw schematic using library components and wires, convert to pcb, autoroute pcb, done. :evilgeek:

( ^ what a lie :lol: )

Posted: 03 Nov 2012, 16:02
by bpiphany
You should always define the schematic first. In the EEschema schematics editor. If your components aren't defined there with references and all, you will sooner or later auto-delete them somehow =P From EEschema you export a netlist file, something that is only possible if all components have been given references properly (annotated).

There are some buttons in the left panel of PCBnew where you can set how much of the ratsnest that is displayed. Everything, only the current component, or nothing. There is also a lot of visibility options under the Render tab in the right hand panel.

I sort of got sidetracked with other business while writing the KiCAD tutorial.. There is a lot of work to be done to it =P

The yellow lines are for the plate cutout, the blue ones the footprint stayout area of the component (I sort of guessed them so don't place anything too close)

Posted: 03 Nov 2012, 16:21
by 7bit
This is from the schematic file:

Code: Select all

$Comp
L SWITCH_PUSH SW0:1
U 1 1 4EB1DDEB
P 4800 6250
F 0 "SW0:1" H 4950 6360 50  0000 C CNN
F 1 "MX" H 4800 6170 50  0000 C CNN
	1    4800 6250
	1    0    0    -1  
$EndComp
$Comp
L DIODE D0:1
U 1 1 4EB1DDEA
P 4800 6600
F 0 "D0:1" H 4800 6700 40  0000 C CNN
F 1 "D" H 4800 6500 40  0000 C CNN
	1    4800 6600
	-1   0    0    1   
$EndComp

I've thrown out any of the controller stuff, so only the switchs are remaining.

Are there any superfluous fields, like text labels which can go?

For instance, what does this MX line do?
> F 1 "MX" H 4800 6170 50 0000 C CNN

>P 4800 6250
This is where the componet is placed.

edit:
Lines starting with F are text, so they can go.

edit2:
Lines starting with U seem to be fluff.

Conponents looking much cleaner now and much easier to auto-generate:

Code: Select all

$Comp
L DIODE D0:13
P 14400 6600
	1    14400 6600
	-1   0    0    1   
$EndComp
$Comp
L SWITCH_PUSH S0:13
P 14400 6250
	1    14400 6250
	1    0    0    -1  
$EndComp


Posted: 03 Nov 2012, 16:49
by 7bit
Side note: It drieves me crazy that sometimes you can add a local path to the library list and sometimes not.

Posted: 03 Nov 2012, 16:51
by 7bit
bpiphany wrote:You should always define the schematic first. In the EEschema schematics editor. ... From EEschema you export a netlist file, something that is only possible if all components have been given references properly (annotated).
And how do I export that file?
:mad:

Answer:
5th icon from the right of the top icon line:
Netlist generation

Posted: 03 Nov 2012, 17:04
by 7bit
OK I've got a netlist (.net) file. Now I need a .cmp file ...

It seems that I need to enter the module names into the netlist.

Posted: 03 Nov 2012, 17:38
by bpiphany
7bit wrote:OK I've got a netlist (.net) file. Now I need a .cmp file ...

It seems that I need to enter the module names into the netlist.
That is the next tool =) CvPcb

You probably don't want to go around deleting fields like that.. They most surely put them there for one reason or another. That hash-looking code there probably is a time stamp. They are used to update components in the PCB editor when you changed reference names. You can choose if you want to use time stamps or references when importing the net list file in PCBnew.

Posted: 03 Nov 2012, 17:49
by 7bit
bpiphany wrote:
7bit wrote:OK I've got a netlist (.net) file. Now I need a .cmp file ...

It seems that I need to enter the module names into the netlist.
That is the next tool =) CvPcb

You probably don't want to go around deleting fields like that.. They most surely put them there for one reason or another. That hash-looking code there probably is a time stamp. They are used to update components in the PCB editor when you changed reference names. You can choose if you want to use time stamps or references when importing the net list file in PCBnew.
Don't you've got a list of steps to perform? It would be much easier than guessing and testing.

:-)

The nextlist file looks quite OK, so there must be something else.

Posted: 03 Nov 2012, 17:54
by Soarer
I haven't seen so much flapping and demanding since ripster tried to fix attachment links on GH! :lol:

Posted: 03 Nov 2012, 18:13
by 7bit
Soarer wrote:I haven't seen so much flapping and demanding since ripster tried to fix attachment links on GH! :lol:
The alternative would be that bpiphany must create all the many PCBs himself.
:evilgeek:

Posted: 03 Nov 2012, 18:24
by Soarer
Well I dunno what your current question is... he told you to run cvpcb to assign the footprints - have you? :roll:

There is another way which might suit scripted generation of .sch files better - the footprint can be assigned to the component (if you know the name). It ends up in the third field, this has footprint "D4"...

Code: Select all

$Comp
L DIODE D1
U 1 1 50954CC8
P 3300 2450
F 0 "D1" H 3300 2550 40  0000 C CNN
F 1 "DIODE" H 3300 2350 40  0000 C CNN
F 2 "D4" H 3260 2590 60  0001 C CNN
	1    3300 2450
	0    -1   -1   0   
$EndComp
It's then put in the netlist, so you don't need to run cvpcb.

One way or another, you need to tell it which footprint to use, since it can't know. A diode could be surface mount with a variety of size, or through-hole with a variety of pad spacings / pad sizes / outline sizes etc.

TBH, I wouldn't bother trying to script the schematic. Either do it by hand or script the netlist. And then write a script to modify the pcb file to position the switches.

Posted: 03 Nov 2012, 18:36
by 7bit
Soarer wrote:Well I dunno what your current question is... he told you to run cvpcb to assign the footprints - have you? :roll:

There is another way which might suit scripted generation of .sch files better - the footprint can be assigned to the component (if you know the name). It ends up in the third field, this has footprint "D4"...

Code: Select all

$Comp
L DIODE D1
U 1 1 50954CC8
P 3300 2450
F 0 "D1" H 3300 2550 40  0000 C CNN
F 1 "DIODE" H 3300 2350 40  0000 C CNN
F 2 "D4" H 3260 2590 60  0001 C CNN
	1    3300 2450
	0    -1   -1   0   
$EndComp
It's then put in the netlist, so you don't need to run cvpcb.

One way or another, you need to tell it which footprint to use, since it can't know. A diode could be surface mount with a variety of size, or through-hole with a variety of pad spacings / pad sizes / outline sizes etc.
cvpcb test.net &
resulkts in an error message:
Cannot open component library <test.cmp>


This is something I don't get. In the brd file there are labels like S0:0, S0:1 etc. and in the sch file these apear as well. Why should there footprint included?

BTW, by footprint, do you mean things like DIODE or CHERRYPCB100H ?

Posted: 03 Nov 2012, 18:47
by Soarer
Footprint is the PCB symbol. DIODE is a schematic symbol (also DIODE is a value), and I presume CHERRYPCB100H is a PCB symbol that you might use with schematic symbol MX (or SWITCH_PUSH). S0:1 is whatever you've named the instance of the component, so of course it will be the same in both PCB and SCH.

In eeschema, right click on a component, Edit component, Edit, and you'll see the fields for Reference (your choice of name), Value (mostly irrelevant for us), and Footprint. You could type CHERRYPCB100H into the footprint field as an alternative to running cvpcb.

Posted: 03 Nov 2012, 19:08
by bpiphany
Step number one on my getting shit to work list is traditionally "Don't mess around with its internal structure"...

Reference is the reference, and needs to be unique and end on a digit like SW1:1 or R1. Value is more custom, think CapsLock, or 10kΩ.

If you just start by toying around with the tools as they are supposed to be used, you'll probably get the hang of this and how the different parts are connected =)

Posted: 03 Nov 2012, 20:01
by 7bit
bpiphany wrote:Step number one on my getting shit to work list is traditionally "Don't mess around with its internal structure"...

Reference is the reference, and needs to be unique and end on a digit like SW1:1 or R1. Value is more custom, think CapsLock, or 10kΩ.

If you just start by toying around with the tools as they are supposed to be used, you'll probably get the hang of this and how the different parts are connected =)
:shock:

You mean it can't be SW1:8, SW1:9, SW1:a ???

OK, I've downloaded the tutorial.cmp file.

So when generating the brd-file, there must be cmp generated with this content:

Code: Select all

BeginCmp
TimeStamp = /4D92DFA7;
Reference = S4:12;
ValeurCmp = S4:12;
IdModule = CHERRYPCB100H;
EndCmp
ValeurCmp is just a text label, so it can have any value.

Posted: 03 Nov 2012, 20:05
by bpiphany
I don't know if it technically can't... The schematic editor complain if you try to save a net list file containing that, but since you are bypassing that I have no idea if you will succeed or not =D

Posted: 03 Nov 2012, 20:14
by 7bit
bpiphany wrote:I don't know if it technically can't... The schematic editor complain if you try to save a net list file containing that, but since you are bypassing that I have no idea if you will succeed or not =D
Good to know it might ba aproblem, so I will test with ending digit and later can try if it can be a letter.

Posted: 03 Nov 2012, 20:23
by Soarer
I'd say give up on the funky references like SW2:3. And also give up on scripting the schematic / netlist too. Simply learn how to use the tools first.

Here's a simple recipe for making the bulk of the schematic...

Add the switches...
- Add one switch.
- Edit its footprint (to CHERRYPCB100H ?).
- Add one diode (?).
- Copy paste to get two, Copy paste to get four, Copy paste to get eight.
- Copy paste to get more columns.
- Maybe delete one or two switches if you don't need full columns/rows.
- Hit Auto-annotate button.

Add the wires...
- tedious (but also hard to script it)

Add the miscellaneous parts...
- Teensy?
- Connectors?
- auto-annotate or edit references yourself
- edit footprints for these parts, or use cvpcb after exporting netlist
- in any case, these are harder to script than to do manually, since there's no repetition

That might take you 30 minutes once you know the basics of the tools. How long to write the script? Yeah, now how long to write a script that copes with special cases, even just non-full columns/rows? And don't miss out the time it takes you to figure out what the script should be writing :lol:

At which point exporting the netlist and importing it to pcbnew should give you a massive stack of components all in the same place. THEN you can think about a script to place the switches. This is the only part I think worth scripting.

I dunno if you're planning on using diodes inside the switches or placing them seperately... if it's the former then I doubt that SW_PUSH is the best choice for the schematic symbol; a custom MX with diode symbol would be better.

Posted: 03 Nov 2012, 22:29
by 7bit
OK, thanks! I will read this when I've got time.

Apropos: The time-stamp must be unique:
duplicate time stamp (/00000000) for S1:12 and S1:13

No problem. I will add a counter to the script....

Posted: 03 Nov 2012, 22:42
by Soarer
You won't have any time if you carry on with your script!

Some saying about trees and the wood springs to mind.

Still, it's up to you, it's your time. I'm done spending mine in this thread :D


And yes, I know it's not just for one keyboard :roll: But quite likely only one schematic is needed for all the micro designs, and only one for all the mini designs, since the differences are more in the PCB placement.

Posted: 04 Nov 2012, 01:00
by Vierax
This thread makes me more and more apprehend this step on my PCB creation :D
I'll wisely start with some easy tutorial to master the beast before.

Posted: 04 Nov 2012, 09:21
by 7bit
I Iet the scripts master the beast for me!
:ugeek:

I can't auto-generate the keyboard layout (yet) but I can generate the .sch and .cmp files:

Controller and LED pads are still missing, but can be added at any time.

Code: Select all

#!/usr/bin/perl -w

my $counter=10000000; # must be 8 digits.
my $offseth=800;
my $offsetw=800;
my $step=800;

my $height=5;
my $width=15;

sub printpos
{
    my $i    = shift;
    my $j    = shift;
    my $posi = shift;
    my $posj = shift;
    my $resi=$offseth+$posi+$i*$step;
    my $resj=$offsetw+$posj+$j*$step;
    print " $resi $resj ";
}

sub printindex
{
    my $i    = shift;
    my $j    = shift;
    $j=($height-1)-$j;
    print "$j:$i";
}

sub drawheader
{
    print "EESchema Schematic File Version 2  date Sat 03 Nov 2012 04:10:08 PM CET\n";
    print "LIBS:components\n";
    print "EELAYER 24  0\n";
    print "EELAYER END\n";
    print "\$Descr A2 23400 16535\n";
    print "Sheet 1 1\n";
    print "Title \"\"\n";
    print "Date \"3 nov 2012\"\n";
    print "Rev \"\"\n";
    print "Comp \"\"\n";
    print "Comment1 \"\"\n";
    print "Comment2 \"\"\n";
    print "Comment3 \"\"\n";
    print "Comment4 \"\"\n";
    print "\$EndDescr\n";
}

sub drawrowline
{
    my $n = shift;

    print "Wire Wire Line\n";
    print "	";
    printpos(0,$n,-100,50);
    printpos($width-1,$n,100,50);
    print "\n";
}

sub drawcolline
{
    my $n = shift;

    print "Wire Wire Line\n";
    print "	";
    printpos($n,0,0,600);
    printpos($n,$height,0,0);
    print "\n";
}

sub printtimestamp
{
    $counter++;
    print "$counter";
}

sub drawcomponent
{
    my $i = shift;
    my $j = shift;
    
    print "\$Comp\n";
    print "L SWITCH_PUSH S";
    printindex($i,$j);
    print "\n";

    print "U 1 1 ";
    printtimestamp();
    print "\n";
    print "P";
    printpos($i,$j,400,250);
    print "\n";

    print "F 0 \"S";
    printindex($i,$j);
    print "\" H";
    printpos($i,$j,550,360);
    print "50  0000 C CNN\n";

    print "F 1 \"MX\" H";
    printpos($i,$j,400,170);
    print "50  0000 C CNN\n";

    print "	1";  
    printpos($i,$j,400,250);
    print "\n";
    print "	1    0    0    -1\n";
    print "\$EndComp\n";

    print "\$Comp\n";
    print "L DIODE D";
    printindex($i,$j);
    print "\n";

    print "U 1 1 ";
    printtimestamp();
    print "\n";

    print "P";   
    printpos($i,$j,400,600);
    print "\n";   

    print "F 0 \"D";
    printindex($i,$j);
    print "\" H";
    printpos($i,$j,400,700);
    print "40  0000 C CNN\n";

    print "F 1 \"D\" H";
    printpos($i,$j,400,500);
    print "40  0000 C CNN\n";

    print "	1";
    printpos($i,$j,400,600);
    print "\n";   

    print "	-1   0    0    1\n";
    print "\$EndComp\n";

    print "Wire Wire Line\n";
    print "	";
    printpos($i,$j,200,600);
    printpos($i,$j,0,600);
    print "\n";

    print "Wire Wire Line\n";
    print "	";
    printpos($i,$j,700,250);
    printpos($i,$j,700,600);
    print "\n";

    print "Wire Wire Line\n";
    print "	";
    printpos($i,$j,700,600);
    printpos($i,$j,600,600);
    print "\n";

    print "Wire Wire Line\n";
    print "	";
    printpos($i,$j,100,250);
    printpos($i,$j,100,50);
    print "\n";

    if($i!=$width-1)
    {
	print "Connection ~ ";
	printpos($i,$j,100,50);
	print "\n";
    }
    if($j!=0)
    {
	print "Connection ~ ";
	printpos($i,$j,0,600);
	print "\n";
    }
    print "\n";
}

sub main
{

    for(@ARGV)
    {
	my $myinline  = $_;
	
	if($myinline eq "--help" || $myinline eq "-h")
	{
	    print "NAME\n";
	    print "       scheme.pl\n\n";
	    print "SYNOPSIS\n";
	    print "       scheme.pl [options]\n\n";
	    print "EXAMPLE\n";
	    print "       scheme.pl -s 5x12 > mykeyboard.sch\n\n";
	    print "nOPTIONS\n";
	    print "       --size, -s  nxm\n";
	    print "              Size of the PCB-matrix\n\n";
	    print "       --help, -h\n";
	    print "              Print help message.\n";
	    exit;
	}
	if(($myinline eq "--size") || $myinline eq "-s")
	{
	    $size_f=1;
	    next;
	}
	if($size_f)
	{
	    $size_f=0;
	    $height=$myinline;
	    $width=$myinline;
	    $height =~ s/^([[:digit:]]+)[x]([[:digit:]]+)$/$1/;
	    $width  =~ s/^([[:digit:]]+)[x]([[:digit:]]+)$/$2/;
	    next;
	}
    }
    drawheader();
    for(my $j=0; $j<$height; $j++)
    {
	drawrowline($j);
	for(my $i=0; $i<$width; $i++)
	{
	    drawcolline($i);
	    drawcomponent($i,$j);
	}
    }
}

main();


# eof
Usage:
scheme.pl -s 4x12 > mykeyboard.sch

Output is the content of a .sch file with the necessary matrix.

Run mykeyboard.sch through kicad-GUI and make a .net file out of it.

The necessary .cmp file is generated by this script:

Code: Select all

#!/bin/bash

# purpose: generate .cmp file from .brd source

echo "Cmp-Mod V01 Created by CvPcb (2012-04-29 BZR 3537)-testing date = Fri 03 Aug 2012 03:04:22 PM CEST"


cat "$@" | grep ^Li -A4 |
grep ^AR -v |
grep ^Op -v |
sed 's/^T0[[:space:]]\([^"]\+\)["]\([^"]\+\)["]\(.*\)$/Reference = \2;\nValeurCmp = \2;\nEndCmp/' |
sed 's/^Li\([[:space:]]*\)\([^[:space:]]\+\)/BeginCmp\nIdModule = \2;/' |
sed 's/^Sc\([[:space:]]*\)\([[:alnum:]]\+\)\([[:space:]]*\)$/TimeStamp = \/\2;/'|
sed 's/[-][-]//'

echo "EndListe"
Usage:

board.sh mykeyboard.brd > mykeyboard.cmp

Then you can load mykeyboard.brd into pcbnew and let it read the netlist (by clicking on the Read Netlist icon in the top panel). Ignore the error messages and you are done.
:-)

This is how it looks like: