Yes, but I want to wirte these things down somewhere, so we have some trouble-shooting database.mintberryminuscrunch wrote:when I read this, I instantly thought "ask bpiphany, he knows about this stuff" ^^
And how is the schematic drawn or generated?Soarer wrote:n00b
You draw a schematic, then output the ratsnest from that.
With eeschema. Some good guides here.7bit wrote: And how is the schematic drawn or generated?
) Code: Select all
$Comp
L SWITCH_PUSH SW0:1
U 1 1 4EB1DDEB
P 4800 6250
F 0 "SW0:1" H 4950 6360 50 0000 C CNN
F 1 "MX" H 4800 6170 50 0000 C CNN
1 4800 6250
1 0 0 -1
$EndComp
$Comp
L DIODE D0:1
U 1 1 4EB1DDEA
P 4800 6600
F 0 "D0:1" H 4800 6700 40 0000 C CNN
F 1 "D" H 4800 6500 40 0000 C CNN
1 4800 6600
-1 0 0 1
$EndComp
Code: Select all
$Comp
L DIODE D0:13
P 14400 6600
1 14400 6600
-1 0 0 1
$EndComp
$Comp
L SWITCH_PUSH S0:13
P 14400 6250
1 14400 6250
1 0 0 -1
$EndComp
And how do I export that file?bpiphany wrote:You should always define the schematic first. In the EEschema schematics editor. ... From EEschema you export a netlist file, something that is only possible if all components have been given references properly (annotated).
That is the next tool =) CvPcb7bit wrote:OK I've got a netlist (.net) file. Now I need a .cmp file ...
It seems that I need to enter the module names into the netlist.
Don't you've got a list of steps to perform? It would be much easier than guessing and testing.bpiphany wrote:That is the next tool =) CvPcb7bit wrote:OK I've got a netlist (.net) file. Now I need a .cmp file ...
It seems that I need to enter the module names into the netlist.
You probably don't want to go around deleting fields like that.. They most surely put them there for one reason or another. That hash-looking code there probably is a time stamp. They are used to update components in the PCB editor when you changed reference names. You can choose if you want to use time stamps or references when importing the net list file in PCBnew.
The alternative would be that bpiphany must create all the many PCBs himself.Soarer wrote:I haven't seen so much flapping and demanding since ripster tried to fix attachment links on GH!
Code: Select all
$Comp
L DIODE D1
U 1 1 50954CC8
P 3300 2450
F 0 "D1" H 3300 2550 40 0000 C CNN
F 1 "DIODE" H 3300 2350 40 0000 C CNN
F 2 "D4" H 3260 2590 60 0001 C CNN
1 3300 2450
0 -1 -1 0
$EndComp
cvpcb test.net &Soarer wrote:Well I dunno what your current question is... he told you to run cvpcb to assign the footprints - have you?
There is another way which might suit scripted generation of .sch files better - the footprint can be assigned to the component (if you know the name). It ends up in the third field, this has footprint "D4"...
It's then put in the netlist, so you don't need to run cvpcb.Code: Select all
$Comp L DIODE D1 U 1 1 50954CC8 P 3300 2450 F 0 "D1" H 3300 2550 40 0000 C CNN F 1 "DIODE" H 3300 2350 40 0000 C CNN F 2 "D4" H 3260 2590 60 0001 C CNN 1 3300 2450 0 -1 -1 0 $EndComp
One way or another, you need to tell it which footprint to use, since it can't know. A diode could be surface mount with a variety of size, or through-hole with a variety of pad spacings / pad sizes / outline sizes etc.
bpiphany wrote:Step number one on my getting shit to work list is traditionally "Don't mess around with its internal structure"...
Reference is the reference, and needs to be unique and end on a digit like SW1:1 or R1. Value is more custom, think CapsLock, or 10kΩ.
If you just start by toying around with the tools as they are supposed to be used, you'll probably get the hang of this and how the different parts are connected =)
Code: Select all
BeginCmp
TimeStamp = /4D92DFA7;
Reference = S4:12;
ValeurCmp = S4:12;
IdModule = CHERRYPCB100H;
EndCmp
Good to know it might ba aproblem, so I will test with ending digit and later can try if it can be a letter.bpiphany wrote:I don't know if it technically can't... The schematic editor complain if you try to save a net list file containing that, but since you are bypassing that I have no idea if you will succeed or not =D
But quite likely only one schematic is needed for all the micro designs, and only one for all the mini designs, since the differences are more in the PCB placement.
Code: Select all
#!/usr/bin/perl -w
my $counter=10000000; # must be 8 digits.
my $offseth=800;
my $offsetw=800;
my $step=800;
my $height=5;
my $width=15;
sub printpos
{
my $i = shift;
my $j = shift;
my $posi = shift;
my $posj = shift;
my $resi=$offseth+$posi+$i*$step;
my $resj=$offsetw+$posj+$j*$step;
print " $resi $resj ";
}
sub printindex
{
my $i = shift;
my $j = shift;
$j=($height-1)-$j;
print "$j:$i";
}
sub drawheader
{
print "EESchema Schematic File Version 2 date Sat 03 Nov 2012 04:10:08 PM CET\n";
print "LIBS:components\n";
print "EELAYER 24 0\n";
print "EELAYER END\n";
print "\$Descr A2 23400 16535\n";
print "Sheet 1 1\n";
print "Title \"\"\n";
print "Date \"3 nov 2012\"\n";
print "Rev \"\"\n";
print "Comp \"\"\n";
print "Comment1 \"\"\n";
print "Comment2 \"\"\n";
print "Comment3 \"\"\n";
print "Comment4 \"\"\n";
print "\$EndDescr\n";
}
sub drawrowline
{
my $n = shift;
print "Wire Wire Line\n";
print " ";
printpos(0,$n,-100,50);
printpos($width-1,$n,100,50);
print "\n";
}
sub drawcolline
{
my $n = shift;
print "Wire Wire Line\n";
print " ";
printpos($n,0,0,600);
printpos($n,$height,0,0);
print "\n";
}
sub printtimestamp
{
$counter++;
print "$counter";
}
sub drawcomponent
{
my $i = shift;
my $j = shift;
print "\$Comp\n";
print "L SWITCH_PUSH S";
printindex($i,$j);
print "\n";
print "U 1 1 ";
printtimestamp();
print "\n";
print "P";
printpos($i,$j,400,250);
print "\n";
print "F 0 \"S";
printindex($i,$j);
print "\" H";
printpos($i,$j,550,360);
print "50 0000 C CNN\n";
print "F 1 \"MX\" H";
printpos($i,$j,400,170);
print "50 0000 C CNN\n";
print " 1";
printpos($i,$j,400,250);
print "\n";
print " 1 0 0 -1\n";
print "\$EndComp\n";
print "\$Comp\n";
print "L DIODE D";
printindex($i,$j);
print "\n";
print "U 1 1 ";
printtimestamp();
print "\n";
print "P";
printpos($i,$j,400,600);
print "\n";
print "F 0 \"D";
printindex($i,$j);
print "\" H";
printpos($i,$j,400,700);
print "40 0000 C CNN\n";
print "F 1 \"D\" H";
printpos($i,$j,400,500);
print "40 0000 C CNN\n";
print " 1";
printpos($i,$j,400,600);
print "\n";
print " -1 0 0 1\n";
print "\$EndComp\n";
print "Wire Wire Line\n";
print " ";
printpos($i,$j,200,600);
printpos($i,$j,0,600);
print "\n";
print "Wire Wire Line\n";
print " ";
printpos($i,$j,700,250);
printpos($i,$j,700,600);
print "\n";
print "Wire Wire Line\n";
print " ";
printpos($i,$j,700,600);
printpos($i,$j,600,600);
print "\n";
print "Wire Wire Line\n";
print " ";
printpos($i,$j,100,250);
printpos($i,$j,100,50);
print "\n";
if($i!=$width-1)
{
print "Connection ~ ";
printpos($i,$j,100,50);
print "\n";
}
if($j!=0)
{
print "Connection ~ ";
printpos($i,$j,0,600);
print "\n";
}
print "\n";
}
sub main
{
for(@ARGV)
{
my $myinline = $_;
if($myinline eq "--help" || $myinline eq "-h")
{
print "NAME\n";
print " scheme.pl\n\n";
print "SYNOPSIS\n";
print " scheme.pl [options]\n\n";
print "EXAMPLE\n";
print " scheme.pl -s 5x12 > mykeyboard.sch\n\n";
print "nOPTIONS\n";
print " --size, -s nxm\n";
print " Size of the PCB-matrix\n\n";
print " --help, -h\n";
print " Print help message.\n";
exit;
}
if(($myinline eq "--size") || $myinline eq "-s")
{
$size_f=1;
next;
}
if($size_f)
{
$size_f=0;
$height=$myinline;
$width=$myinline;
$height =~ s/^([[:digit:]]+)[x]([[:digit:]]+)$/$1/;
$width =~ s/^([[:digit:]]+)[x]([[:digit:]]+)$/$2/;
next;
}
}
drawheader();
for(my $j=0; $j<$height; $j++)
{
drawrowline($j);
for(my $i=0; $i<$width; $i++)
{
drawcolline($i);
drawcomponent($i,$j);
}
}
}
main();
# eof
Code: Select all
#!/bin/bash
# purpose: generate .cmp file from .brd source
echo "Cmp-Mod V01 Created by CvPcb (2012-04-29 BZR 3537)-testing date = Fri 03 Aug 2012 03:04:22 PM CEST"
cat "$@" | grep ^Li -A4 |
grep ^AR -v |
grep ^Op -v |
sed 's/^T0[[:space:]]\([^"]\+\)["]\([^"]\+\)["]\(.*\)$/Reference = \2;\nValeurCmp = \2;\nEndCmp/' |
sed 's/^Li\([[:space:]]*\)\([^[:space:]]\+\)/BeginCmp\nIdModule = \2;/' |
sed 's/^Sc\([[:space:]]*\)\([[:alnum:]]\+\)\([[:space:]]*\)$/TimeStamp = \/\2;/'|
sed 's/[-][-]//'
echo "EndListe"